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v
MC33304 Low Voltage Rail-To-Rail Sleep-Modet Operational Amplifier
The MC33304 is a monolithic bipolar operational amplifier. This low voltage rail-to-rail amplifier has both a rail-to-rail input and output stage, with high output current capability. This amplifier also employs Sleep-Mode technology. In sleepmode, the micropower amplifier is active and waiting for an input signal. When a signal is applied, causing the amplifier to source or sink 200 A (typically) to the load, it will automatically switch to the awakemode (supplying up to 70 mA to the load). When the output current drops below 90 A, the amplifier automatically returns to the sleepmode. Excellent performance can be achieved as an audio amplifier. This is due to the amplifier's low noise and low distortion. A delay circuit is incorporated to prevent crossover distortion. * Ideal for Battery Applications
RAIL-TO-RAIL SLEEP-MODE OPERATIONAL AMPLIFIER
SEMICONDUCTOR TECHNICAL DATA
* * * * * * * * * * * * * *
Full Output Signal (No Distortion) for Battery Applications Down to 0.9 VDC. Single Supply Operation (+1.8 to +12 V) Rail-To-Rail Performance on Both the Input and Output Output Voltages Swings Typically within 100 mV of Both Rails (RL = 1.0 m) Two States: "Sleepmode" (Micropower, ID = 110 A/Amp) and "Awakemode" (High Performance, ID = 1200 A/Amp) Automatic Return to Sleepmode when Output Current Drops Below Threshold, Allowing a Fully Functional Micropower Amplifier Independent Sleepmode Function for Each Amplifier No Phase Reversal on the Output for Overdriven Input Signals High Output Current (70 mA typically) 600 Drive Capability Standard Pinouts; No Additional Pins or Components Required Drop-In Replacement for Many Other Quad Operational Amplifiers Similar to MC33201, MC33202 and MC33204 Family The MC33304 Amplifier is Offered in the Plastic DIP or SOIC Package (P and D Suffixes)
14 1
P SUFFIX PLASTIC PACKAGE CASE 646
14 1
D SUFFIX PLASTIC PACKAGE CASE 751A (SO-14)
PIN CONNECTIONS
Output 1 1 2 Inputs 1 3 VCC 4 1 4
14 Output 4 13 Inputs 4 12 11 10 2 3 Inputs 3 9 8 Output 3 VEE
Sleep-Mode is a trademark of Motorola, Inc. 5
TYPICAL DC ELECTRICAL CHARACTERISTICS (TA = 25C)
Characteristic Input Offset Voltage VIO(max) MC33304 Output Voltage Swing VOH (RL = 600 ) VOL (RL = 600 ) Power Supply Current per Amplifier (ID) Awakemode Sleepmode VCC = 2.0 V VCC = 3.3 V VCC = 5.0 V Unit mV 10 1.85 0.15 10 3.10 0.15 10 4.75 0.15 Vmin Vmax
Inputs 2 6 Output 2 7
(Quad, Top View)
ORDERING INFORMATION
Device Operating Temperature Range TA = - 40 to +105C Package SO-14 Plastic DIP
Rev 0
1.625 140
1.625 140
1.625 140
mA A
MC33304D MC33304P
Specifications are for reference only and not necessarily guaranteed. VEE = Gnd.
(c) Motorola, Inc. 1996
MOTOROLA ANALOG IC DEVICE DATA
1
MC33304
MAXIMUM RATINGS
Rating Supply Voltage (VCC to VEE) ESD Protection Voltage at Any Pin Human Body Model Voltage at Any Device Pin (Note 2) Input Differential Voltage Range Output Short Circuit Duration Maximum Junction Temperature Storage Temperature Range Maximum Power Dissipation Symbol VS VESD 2000 VDP VIDR ts TJ Tstg PD VS 0.5 (Notes 1 & 2) Indefinite (Note 3) +150 -65 to +150 (Note 5) V V sec C C mW Value +16 Unit V V
RECOMMENDED OPERATING CONDITIONS
Characteristic Supply Voltage Single Supply Split Supplies Input Voltage Range, Sleepmode and Awakemode Ambient Operating Temperature Range Symbol VS 1.8 0.9 VICR TA VEE -40 - - - - 12 6.0 VCC +105 V C Min Typ Max Unit V
DC ELECTRICAL CHARACTERISTICS (VCC = +5.0 V, VEE = Gnd, TA = 25C, unless otherwise noted.)
Characteristic Input Offset Voltage (VCM = 0 V, VO = 0 V) (Note 4) Sleepmode and Awakemode TA = 25C TA = -40 to +105C Average Temperature Coefficient of Input Offset Voltage (RS = 50 , VCM = 0 V, VO = 0 V) TA = -40 to +105C, Sleepmode and Awakemode Input Bias Current (VCM = 0 V, VO = 0 V) (Note 4) Awakemode TA = 25C TA = -40 to +105C Input Offset Current (VCM = 0 V, VO = 0 V) (Note 4) Awakemode TA = 25C TA = -40 to +105C Large Signal Voltage Gain (VCC = +5.0 V, VEE = -5.0 V) Awakemode, RL = 600 TA = 25C TA = -40 to +105C Power Supply Rejection Ratio, Awakemode Output Short Circuit Current (Awakemode) (VID = 0.2 V) Source Sink Output Transition Current, Source/Sink Sleepmode to Awakemode, VCC = +1.0 V, VEE = -1.0 V Awakemode to Sleepmode, VCC = +5.0 V, VEE -5.0 V Symbol VIO -10 -13 VIO/T - IIB| - - |IIO| - - AVOL 90 85 PSRR ISC -200 +50 |ITH1| |ITH2| - 90 -89 +89 - - -50 +200 A 200 - 65 116 - 90 - - - dB mA 3.1 - +50 +100 dB 90 - +200 +500 nA 2.0 - nA 0.7 - +10 +13 V/C Min Typ Max Unit mV
2
MOTOROLA ANALOG IC DEVICE DATA
MC33304
DC ELECTRICAL CHARACTERISTICS (continued) (VCC = +5.0 V, VEE = Gnd, TA = 25C, unless otherwise noted.)
Characteristic Output Voltage Swing (VID = 0.2 V) Sleepmode VCC = +5.0 V, VEE = 0 V, RL = 1.0 M VCC = 0 V, VEE = -5.0 V, RL = 1.0 M VCC = +2.0 V, VEE = 0 V, RL = 1.0 M VCC = 0 V, VEE = -2.0 V, RL = 1.0 M Awakemode VCC = +5.0 V, VEE = 0 V, RL = 600 VCC = 0 V, VEE = -5.0 V, RL = 600 VCC = +2.0 V, VEE = 0 V, RL = 600 VCC = 0 V, VEE = -2.0 V, RL = 600 VCC = +2.5 V, VEE = -2.5 V, RL = 600 VCC = +2.5 V, VEE = -2.5 V, RL = 600 Common Mode Rejection Ratio Power Supply Current (per Amplifier) Sleepmode VCC = +2.0 V, VEE = 0 V TA = +25C VCC = +2.5 V, VEE = -2.5 V TA = +25C TA = -40 to +105C VCC = +12 V, VEE = 0 V TA = +25C Awakemode VCC = +2.5 V, VEE = -2.5 V TA = +25C TA = -40 to +105C Thermal Resistance SOIC Plastic DIP Symbol Min Typ Max Unit V VOH VOL VOH VOL VOH VOL VOH VOL VOH VOL CMRR ID - - - - - - JA - - 145 75 - - 85 110 - 125 1200 - - 140 150 - 1625 1750 C/W 4.90 - 1.90 - 4.75 - 1.85 - - - 60 4.97 -4.96 1.98 -1.97 4.86 -4.85 1.91 -1.90 2.41 -2.40 90 - -4.90 - -1.90 - -4.75 - -1.85 - - - dB A
AC ELECTRICAL CHARACTERISTICS (VCC = +6.0 V, VEE = -6.0 V, RL = 600 , TA = 25C, unless otherwise noted.)
Characteristic Slew Rate (VCC = +2.5 V, VEE = -2.5 V, AV = +1.0) (Note 6) Awakemode Gain Bandwidth Product (f = 100 kHz) Awakemode Gain Margin (CL = 0 pF) Awakemode Sleepmode (RL = 1.0 k) Phase Margin (RL = 1.0 k, VO = 0 V, CL = 0 pF) Awakemode Sleepmode Sleepmode to Awakemode Transition Time RL = 600 RL = 10 k Awakemode to Sleepmode Transition Time Channel Separation (f = 1.0 kHz) Awakemode Symbol SR 0.5 GBW - Am - - m - - ttr1 - - ttr2 CS - 100 - - 4.0 12 1.5 - - - 40 60 - - sec 6.0 9.0 - - Deg 2.2 - dB 0.89 - MHz Min Typ Max Unit V/s
sec dB
NOTES: 1. The differential input voltage of each amplifier is limited by two internal diodes. The diodes are connected across the inputs in parallel and opposite to each other. For more differential input voltage range, use current limiting resistors in series with the input pins. 2. The common-mode input voltage range of each amplifier is limited by diodes connected from the inputs to both power supply rails. Therefore, the voltage on either input must not exceed supply rail by more than 500 mV. 3. Simultaneous short circuits of two or more amplifiers to the positive or negative rail can exceed the power dissipation ratings and cause eventual failure of the device. 4. Rail-to-rail performance is achieved at the input of the amplifier by using parallel NPN-PNP differential stages. When the inputs are near the negative rail (VEE < VCM < 800 mV), the PNP stage is on. When the inputs are above 800 mV (i.e. 800 mV < VCM < VCC), the NPN stage is on. This switching of the input pairs will cause a reversal of input bias current. Slight changes in the input offset voltage will be noted between the NPN and PNP pairs. Cross-coupling techniques have been used to keep this change to a minimum. 5. Power dissipation must be considered to ensure maximum junction (TJ) is not exceeded. (See Figure 2) 6. When connected as a voltage follower and used in transient conditions, a current limiting resistor may be needed between the output and the inverting input. This is because of the back to back diodes clamped across the inputs. The value of this resistor should be between 1.0 k and 10 k. If the amplifier does not become slew rate limited and is processing low frequency waveforms, then no resistor would be necessary. (The output could be tied directly to the negative input.)
MOTOROLA ANALOG IC DEVICE DATA
3
MC33304
AC ELECTRICAL CHARACTERISTICS (continued) (VCC = +6.0 V, VEE = -6.0 V, RL = 600 , TA = 25C, unless otherwise noted.)
Characteristic Power Bandwidth (VO = 4.0 Vpp, RL = 2.0 k, THD 1.0%) Awakemode Distortion (VO = 2.0 Vpp, AV = +1.0) Awakemode (f = 10 kHz) Sleepmode (f = 1.0 kHz, RL = Infinite) Open Loop Output Impedance (VO = 0 V, f = 2.0 MHz, AV = +10, IQ = 10 A) Awakemode Sleepmode Differential Input Impedance (VCM = 0 V) Awakemode Sleepmode Differential Input Capacitance (VCM = 0 V) Awakemode Sleepmode Equivalent Input Noise Voltage (RS = 100 , f = 1.0 kHz) Awakemode Sleepmode Equivalent Input Noise Current (f = 1.0 kHz) Awakemode Sleepmode Symbol BWp - THD - - |ZO| - - RIN - - CIN - - en - - in - - 0.22 0.20 - - 15 60 - - 8.0 0.4 - - nV Hz 200 1300 - - pF 100 1000 - - k 0.009 0.007 - - 28 - % Min Typ Max Unit kHz
pA Hz
NOTES: 1. The differential input voltage of each amplifier is limited by two internal diodes. The diodes are connected across the inputs in parallel and opposite to each other. For more differential input voltage range, use current limiting resistors in series with the input pins. 2. The common-mode input voltage range of each amplifier is limited by diodes connected from the inputs to both power supply rails. Therefore, the voltage on either input must not exceed supply rail by more than 500 mV. 3. Simultaneous short circuits of two or more amplifiers to the positive or negative rail can exceed the power dissipation ratings and cause eventual failure of the device. 4. Rail-to-rail performance is achieved at the input of the amplifier by using parallel NPN-PNP differential stages. When the inputs are near the negative rail (VEE < VCM < 800 mV), the PNP stage is on. When the inputs are above 800 mV (i.e. 800 mV < VCM < VCC), the NPN stage is on. This switching of the input pairs will cause a reversal of input bias current. Slight changes in the input offset voltage will be noted between the NPN and PNP pairs. Cross-coupling techniques have been used to keep this change to a minimum. 5. Power dissipation must be considered to ensure maximum junction (TJ) is not exceeded. (See Figure 2) 6. When connected as a voltage follower and used in transient conditions, a current limiting resistor may be needed between the output and the inverting input. This is because of the back to back diodes clamped across the inputs. The value of this resistor should be between 1.0 k and 10 k. If the amplifier does not become slew rate limited and is processing low frequency waveforms, then no resistor would be necessary. (The output could be tied directly to the negative input.)
4
MOTOROLA ANALOG IC DEVICE DATA
MC33304
Figure 1. Equivalent Circuit Block Diagram (Each Amplifier)
Fractional Load Current Detector
Current Threshold Detector % of IL
Awake to Sleepmode Delay Circuit IHysteresis IEnable
Buffer Iref CStorage
Buffer
Bias
Bias Boost
IL Vin Input Stage Interface Stage Output Stage RL Vout
Overdrive Correction
IBias Enable Sleepmode Current Regulator ISleep Awakemode Current Regulator IAwake
There are 515 active components for the entire quad device.
MOTOROLA ANALOG IC DEVICE DATA
5
MC33304
DEVICE DESCRIPTION
The MC33304 will begin to function at power supply voltages as low as VS = 0.8 V. The device has the ability to swing rail-to-rail on both the input and the output. Since the common mode input voltage range extends from VCC to VEE, it can be operated with either single or split voltage supplies. The MC33304 is guaranteed not to latch up or phase reverse over the entire common mode range. However, the output could go into phase reversal state if input voltage is set higher than +VCC or -VEE. When power is initially applied, the part may start to operate in the awakemode. This occurs because of bias currents being generated from the charging of the internal capacitors. When this occurs, the user will have to wait approximately 1.5 seconds before the device will switch back to the sleepmode. The amplifier is designed to switch from sleepmode to awakemode whenever the output current exceeds a preset current threshold (ITH) of approximately 200 A. As a result, the output switching threshold voltage (VST) is controlled by the output loading resistance (RL). Large valued load resistors require a large output voltage to switch, but reduce unwanted transitions to the awakemode. Most of the transition time is consumed slewing in the sleepmode until VST is reached, therefore, small values of RL allow rapid transition to the awakemode. The output switching threshold voltage (VST) is higher for the larger values of RL, requiring the amplifier to slew longer in the slower sleepmode state before switching to the awakemode. Although typically 200 A, ITH varies with supply voltage, temperature and the load resistance. Generally, any current loading on the ouput which causes a current greater than ITH to flow will switch the amplifier into the awakemode. This includes transition currents like those generated by charging load capacitances. In fact, the maximum capacitance that can be driven while attempting to remain in the sleepmode is approximately 300 pF. The awakemode to sleepmode transition time is controlled by an internal delay circuit, which is necessary to prevent the amplifier from going to sleep during every zero crossing of the output waveform. This delay circuit also eliminates the crossover distortion commonly found in micropower amplifiers. The MC33304 rail-to-rail sleepmode operational amplifier is unique in its ability to swing rail-to-rail on both the input and output using a bipolar design. This offers a low noise and wide common mode input voltage range. Since the common mode input voltage range extends from VCC to VEE, it can be operated with either single or split voltage supplies. Rail-to-rail performance is achieved at the input of the amplifiers by using parallel NPN-PNP differential input stages. When the inputs are within 800 mV of the negative rail, the PNP stage is on. When the inputs are more than 800 mV above VEE, the NPN stage is on. This switching of input pairs will cause a reversal of input bias currents. Also, slight differences in offset voltage may be noted between the NPN and PNP pairs. Cross-coupling techniques have been used to keep this change to a minimum. In addition to the rail-to-rail performance, the output stage is current boosted to provide enough output current to drive 600 loads. Because of this high current capability, care should be taken not to exceed the 150C maximum junction temperature specification.
6
MOTOROLA ANALOG IC DEVICE DATA
MC33304
Figure 2. Maximum Power Dissipation versus Temperature
2.5 k IIB , INPUT BIAS CURRENT (nA) 2.0 k MC33304P 1.5 k MC33304P 1.0 k 0.5 k 0 -55 -40 -25 150 135 120 105 90 75 -55 Awakemode VCC = +5.0 V VEE = Gnd VCM = 0 V
PD(max) , MAXIMUM POWER DISSIPATION (mW)
Figure 3. Input Bias Current versus Temperature
0
25
50
85
125
-40 -25
0
25
50
85
125
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 4. Input Bias Current versus Common Mode Input Voltage
IIB, INPUT BIAS CURRENT (nA) TA = 25C VCC = +5.0 V VEE = Gnd Sleepmode A VOL, OPEN LOOP VOLTAGE GAIN (dB) 100 50 0 -50 Awakemode -100 -150 -6.0 130 120 110 100 90
Figure 5. Open Loop Voltage Gain versus Temperature
VCC = +5.0 V VEE = Gnd RL = 600 VO = 0.5 to 4.5 V Awakemode 0 25 50 85 125
-4.0
-2.0
0
2.0
4.0
6.0
80 -55 -40 -25
VCM, COMMON MODE INPUT VOLTAGE (V)
TA, AMBIENT TEMPERATURE (C)
Figure 6. Output Voltage Swing versus Supply Voltage
12 VO, OUTPUT VOLTAGE (Vpp ) 10 8.0 6.0 4.0 2.0 0 1.0 VO, OUTPUT VOLTAGE SWING (Vpp ) RL = 600 - 1.0 M TA = 25C Awakemode/ Sleepmode 12 10 8.0 6.0 4.0 2.0 0 0.1
Figure 7. Output Voltage versus Frequency
Sleepmode (RL = 1.0 M) Awakemode (RL = 600 ) VCC = +6.0 V VEE = -6.0 V AV = +1.0 TA = 25C 1.0 10 f, FREQUENCY (kHz) 100 1.0 k
2.0 3.0 4.0 5.0 VCC,VEE SUPPLY VOLTAGE (V)
6.0
MOTOROLA ANALOG IC DEVICE DATA
7
MC33304
Figure 8. Maximum Peak-to-Peak Output Voltage Swing versus Load Resistance
CMR, COMMOM MODE REJECTION (dB) 100 VO, OUTPUT VOLTAGE SWING (Vpp ) 100 80 60 Sleepmode 40 20 0 10 VCC = +6.0 V VEE = -6.0 V TA = 25C 100 1.0 k 10 k 100 k 1.0 m 10 m Awakemode
Figure 9. Common Mode Rejection versus Frequency
10
1.0 VCC = +6.0 V VEE = -6.0 V f = 1.0 kHz TA = 25C 100 1.0 k 10 k 100 k RL, LOAD RESISTANCE TO GROUND ()
0.1 10
f, FREQUENCY (Hz)
Figure 10. Power Supply Rejection versus Frequency
PSR, POWER SUPPLY REJECTION (dB) 80 TH2 , CURRENT THRESHOLD ( A) I PSR Awakemode PSR Sleepmode 240
Figure 11. Awakemode to Sleepmode Current Threshold versus Supply Voltage
Source Current 200 TA = 125C 160 TA = 25C 120 TA = -55C
60
40
20
VCC = +6.0 V VEE = -6.0 V TA = 25C 100 1.0 k 10 k 100 k 1.0 M 10 M
0 10
80 0
1.0
2.0
3.0
4.0
5.0
6.0
f, FREQUENCY (Hz)
VCC, VEE, SUPPLY VOLTAGE (V)
, SC OUTPUT SHORT CIRCUIT CURRENT (mA) I
Figure 12. Sleepmode to Awakemode Current Threshold versus Supply Voltage
260 ITH1 , CURRENT THRESHOLD ( A) Source Current 240 220 200 TA = -55C 180 TA = 125C 160 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 TA = 25C
Figure 13. Output Short Circuit Current versus Output Voltage
80
70 Source 60 Sink 50 VCC = +6.0 V VEE = -6.0 V VID = 1.0 V Awakemode 2.0 4.0 6.0
40 0
VCC, VEE, SUPPLY VOLTAGE (V)
IVOI, OUTPUT VOLTAGE (V)
8
MOTOROLA ANALOG IC DEVICE DATA
MC33304
Figure 14. Output Short Circuit Current versus Temperature
120 Source VCC = +5.0 V VEE = Gnd VID = 0.2 V RL = 1.0 M Awakemode 4.0 k I D, SUPPLY CURRENT ( A)
, SC OUTPUT SHORT CIRCUIT CURRENT (mA) I
Figure 15. Supply Current versus Supply Voltage with Load
100 Sink
3.0 k
80
2.0 k
60
1.0 k Single Supply RL = 600 0 0 3.5 7.0 VCC, SUPPLY VOLTAGE (V) 10.5 14
40 -55 -40 -25
0
25
50
85
125
TA, AMBIENT TEMPERATURE (C)
Figure 16. Supply Current versus Supply Voltage
600 I D, SUPPLY CURRENT ( A) 500 400 Sleepmode (A) 300 200 100 0 0 Single Supply No Load 2.0 4.0 6.0 8.0 10 12 14 SR, SLEW RATE (V/ s) 1.5 2.0
Figure 17. Slew Rate versus Temperature
VCC = +2.5 V VEE = -2.5 V VO = 2.0 V RL= 600 + Slew Rate 1.0 - Slew Rate 0.5
0 -55 -40 -25
0
25
70
85
105 125
V CC , SUPPLY VOLTAGE (V)
TA, AMBIENT TEMPERATURE (C)
Figure 18. Gain Bandwidth Product versus Temperature
GBW, GAIN BANDWIDTH PRODUCT (MHz) 4.0 VCC = + 2.5 V VEE = - 2.5 V f = 100 kHz A m , GAIN MARGIN (dB) 14 12 10 8.0 6.0 4.0 2.0 0 -55 -40 -25 0 25 70 85 105 125 0 10
Figure 19. Gain Margin versus Differential Source Resistance
3.0
Sleepmode
2.0
Awakemode
1.0
VCC = +6.0 V VEE = -6.0 V RT = R1 + R2 100
VO = 0 V TA = 25C 1.0 k 10 k
TA, AMBIENT TEMPERATURE (C)
RT, DIFFERENTIAL SOURCE RESISTANCE ()
MOTOROLA ANALOG IC DEVICE DATA
9
MC33304
Figure 20. Phase Margin versus Differential Source Resistance
80 70 m , PHASE MARGIN ( ) A m , GAIN MARGIN (dB) Sleepmode 60 50 40 Awakemode 30 20 10 10 VCC = +6.0 V VEE = -6.0 V RT = R1 + R2 100 VO = 0 V TA = 25C 1.0 k 10 k 7.0 9.0 Sleepmode
Figure 21. Gain Margin versus Output Load Capacitance
5.0 Awakemode 3.0 VCC = +6.0 V VEE = -6.0 V 1.0 10 100 CL, OUTPUT LOAD CAPACITANCE (pF) 1.0 k
RT, DIFFERENTIAL SOURCE RESISTANCE ()
Figure 22. Phase Margin versus Output Load Capacitance
70 CS, CHANNEL SEPARATION (dB) 60 PHASE MARGIN ( ) 50 40 30 20 10 0 10 100 CL, OUTPUT LOAD CAPACITANCE (pF) 1.0 k Awakemode Sleepmode 140 120 100 80 60 40 20 0 100
Figure 23. Channel Separation versus Frequency
VCC = +6.0 V VEE = -6.0 V RL = 600 Awakemode 1.0 k 10 k 100 k
f, FREQUENCY (Hz)
en , INPUT REFERRED NOISE VOLTAGE (nV/ Hz)
Figure 24. Total Harmonic Distortion versus Frequency
THD, TOTAL HARMONIC DISTORTION (%) 100 10 1.0 AV = 1000 0.1 0.01 AV = 1.0 0.001 100 1.0 k 10 k 100 k AV = 100 AV = 10 VCC = +6.0 V VEE = -6.0 V RL = 600 VO = 2.0 Vpp TA = 25C Awakemode
Figure 25. Input Referred Noise Voltage versus Frequency
100 80 Sleepmode 60 40 20 10 10 Awakemode VCC = +6.0 V VEE = -6.0 V TA = 25C
100
1.0 k f, FREQUENCY (Hz)
10 k
100 k
f, FREQUENCY (Hz)
10
MOTOROLA ANALOG IC DEVICE DATA
MC33304
Figure 27. Percent Overshoot versus Load Capacitance
100 OS, PERCENT OVERSHOOT (%) VCC = +6.0 V VEE = -6.0 V TA = 25C (RS = 100 k) 80 60 40 20 0 10 Sleepmode (RL = ) 100 CL, LOAD CAPACITANCE (pF) 1.0 k Awakemode (RL = 600 ) VCC = +6.0 V VEE = -6.0 V TA = 25C
Figure 26. Current Noise versus Frequency
1.4 i n , INPUT NOISE CURRENT (pA/ Hz) 1.2 1.0 Awakemode 0.8 0.6 0.4 0.2 Sleepmode 0 10 100 1.0 k f, FREQUENCY (Hz) 10 k 100 k
MOTOROLA ANALOG IC DEVICE DATA
11
MC33304
OUTLINE DIMENSIONS
P SUFFIX PLASTIC PACKAGE CASE 646-06 ISSUE L
14 8
B
1 7
NOTES: 1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE POSITION AT SEATING PLANE AT MAXIMUM MATERIAL CONDITION. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 4. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M N INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.300 BSC 0_ 10_ 0.015 0.039 MILLIMETERS MIN MAX 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.62 BSC 0_ 10_ 0.39 1.01
A F C N H G D
SEATING PLANE
L
J K M D SUFFIX PLASTIC PACKAGE CASE 751A-03 (SO-14) ISSUE F
-A-
14 8
-B-
1 7
P 7 PL 0.25 (0.010)
M
B
M
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
G C
R X 45 _
F
-T-
SEATING PLANE
D 14 PL 0.25 (0.010)
M
K TB
S
M A
S
J
DIM A B C D F G J K M P R
MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50
INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019
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*MC33304/D*
MOTOROLA ANALOG IC DEVICE DATA MC33304/D

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Price & Availability of MC33304

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